The DMA channel that is to be programmed should always be ``masked'' before loading any settings. This is because the hardware might assert DRQ, and the DMA might respond, even though not all of the parameters have been loaded or updated.
Once masked, the host must specify the direction of the transfer (memory-to-I/O or I/O-to-memory), what mode of DMA operation is to be used for the transfer (Single, Block, Demand, Cascade, etc), and finally the address and length of the transfer are loaded. The length that is loaded is one less than the amount you expect the DMA to transfer. The LSB and MSB of the address and length are written to the same 8-bit I/O port, so another port must be written to first to guarantee that the DMA accepts the first byte as the LSB and the second byte as the MSB.
Then, be sure to update the Page Register, which is external to the DMA and is accessed through a different set of I/O ports.
Once all the settings are ready, the DMA channel can be un-masked. That DMA channel is now considered to be ``armed'', and will respond when DRQ is asserted.
Refer to a hardware databook for precise programming details for the 8237. You will also need to refer to the I/O port map for the PC system. This map describes where the DMA and Page Register ports are located. A complete table is located below.